Hardware and Software: Verification and Testing: Lecture Notes in Computer Science, cartea 8855
Editat de Eran Yahaven Limba Engleză Paperback – 6 noi 2014
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Specificații
ISBN-13: 9783319133379
ISBN-10: 3319133373
Pagini: 320
Ilustrații: XVI, 302 p. 78 illus.
Dimensiuni: 155 x 235 x 18 mm
Greutate: 0.49 kg
Ediția:2014
Editura: Springer
Colecția Lecture Notes in Computer Science
Seria Lecture Notes in Computer Science
Locul publicării:Cham, Switzerland
ISBN-10: 3319133373
Pagini: 320
Ilustrații: XVI, 302 p. 78 illus.
Dimensiuni: 155 x 235 x 18 mm
Greutate: 0.49 kg
Ediția:2014
Editura: Springer
Colecția Lecture Notes in Computer Science
Seria Lecture Notes in Computer Science
Locul publicării:Cham, Switzerland
Public țintă
ResearchCuprins
Using Coarse-Grained Abstractions to Verify Linearizability on TSO Architectures.- Enhancing Scenario Quality Using Quasi-Events.- Combined Bounded and Symbolic Model Checking for Incomplete Timed Systems.- DynaMate: Dynamically Inferring Loop Invariants for Automatic Full Functional Verification.- Generating Modulo-2 Linear Invariants for Hardware Model Checking.- Suraq — A Controller Synthesis Tool Using Uninterpreted Functions.- Synthesizing Finite-State Protocols from Scenarios and Requirements.- Automatic Error Localization for Software Using Deductive Verification.- Generating JML Specifications from Alloy Expressions.- Assume-Guarantee Abstraction Refinement Meets Hybrid Systems.- Handling TSO in Mechanized Linearizability Proofs.- Partial Quantifier Elimination.- Formal Verification of 800 Genetically Constructed Automata Programs: A Case Study.- A Framework to Synergize Partial Order Reduction with State Interpolation.- Reduction of Resolution Refutations and Interpolants via Subsumption.- Read, Write and Copy Dependencies for Symbolic Model Checking.- Efficient Combinatorial Test Generation Based on Multivalued Decision Diagrams.- Formal Verification of Secure User Mode Device Execution with DMA.- Supervisory Control of Discrete-Event Systems via IC3.- Partial-Order Reduction for Multi-core LTL Model Checking.- A Comparative Study of Incremental Constraint Solving Approaches in Symbolic Execution.