Embedded Memory Design for Multi-Core and Systems on Chip
Autor Baker Mohammaden Limba Engleză Hardback – 23 oct 2013
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Specificații
ISBN-13: 9781461488804
ISBN-10: 146148880X
Pagini: 112
Ilustrații: XIII, 95 p. 63 illus., 37 illus. in color.
Dimensiuni: 160 x 241 x 12 mm
Greutate: 0.29 kg
Ediția:2014
Editura: Springer
Locul publicării:New York, NY, United States
ISBN-10: 146148880X
Pagini: 112
Ilustrații: XIII, 95 p. 63 illus., 37 illus. in color.
Dimensiuni: 160 x 241 x 12 mm
Greutate: 0.29 kg
Ediția:2014
Editura: Springer
Locul publicării:New York, NY, United States
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Public țintă
ResearchCuprins
Introduction.- Cache Architecture and Main Blocks.- Embedded Memory Hierarchy.- SRAM Memory Operation and Yield.- Low Power and High Yield SRAM Memory.- Leakage Reduction.- Embedded Memory Verification.- Embedded Memory Design Validation and Design For Test.- Emerging Memory Technology Opportunities and Challenges.
Textul de pe ultima copertă
This book describes the various tradeoffs systems designers face when designing embedded memory. Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test. The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.
· Provides a comprehensive overview of embedded memory design and associated challenges and choices;
· Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design;
· Includes detailed discussion of memory hierarchy and its impact on energy and performance;
· Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.
· Provides a comprehensive overview of embedded memory design and associated challenges and choices;
· Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design;
· Includes detailed discussion of memory hierarchy and its impact on energy and performance;
· Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis.
Notă biografică
TTemesghen Tekeste received the B.S. degree in electrical engineering from Asmara University, Eritrea, in 2007, and the M.S. degree in microsystems engineering from the Masdar Institute of Science and Technology, Abu Dhabi, in 2012, with a focus on low-power, mixed signal integrated circuit design that involved schematic design, simulation, layout, and verification of an ultra-low power clock generator for heart rate sensor IC. He received his Ph.D. from Khalifa University, Abu Dhabi, United Arab Emirates in 2018, where he researched on ultra-low power digital circuit design for biomedical application.. In 2006, he joined the Eritrea Institute of Technology, Asmara, as a Teaching Assistant and a Lab Instructor. He holds two issued U.S. patents, and has authored journal and conference papers. His research interest includes DSP hardware design, computer architecture, ASIC chip design, and FPGA design.
Hani Saleh isan associate professor of electronic engineering at Khalifa University since Jan, 2012. He is an a co-founder and an active member in KSRC (Khalifa University Research Center) where he leads a project for the development of wearable blood glucose monitor SOC and a mobile surveillance SOC and safe exercise monitoring device. Hani published over 100 articles in peer-reviewed journals and conferences, he has 15 issued US patents and 5 pending patent applications. Hani has a close to 19 years of industrial experience in ASIC chip design, microprocessor design, DSP core design, graphics core design and embedded system design. His experience spans DSP core design, microprocessor peripherals design, microprocessors and graphics core deign. Prior to joining Khalifa University he worked as a Senior Chip Designer (Technical Lead) at Apple incorporation; where he worked on the design and implementation of Apple next generation graphics cores for its mobile products (iPad, iPhone, ...etc.), prior tojoining Apple, he worked for several leading semiconductor companies including Intel (ATOM mobile microprocessor design), AMD (Bobcat mobile microprocessor design), Qualcomm (QDSP DSP core design for mobile SOC's), Synopsys (a key member of Synopsys turnkey design group where he taped out many ASICs and designed the I2C DW IP included in Synopys DesignWare library), Fujitsu (SPARC compatible high performance microprocessor design) and Motorola Australia (M210 low power microprocessor synthesizable core design).
Baker Mohammad earned his PhD from University of Texas at Austin in 2008, his M.S. degree from Arizona State University, Tempe, and BS degree from the University of New Mexico, Albuquerque, all in ECE. Baker is associate professor of ECE at Khalifa University and a founding member of KU Semiconductor Research Center. Prior to joining Khalifa University Baker was a Senior staff Engineer/^ 100Watt (IA-64), to mobile embedded processor low power sub 1 watt (xscale). His research interest includes VLSI, power efficient computing, high yield embedded memory, emerging technology such as memristor, STTRAM, In-Memory-Computing, Efficient hardware accelerator for search engine and image processing. In addition, he is engaged in microwatt range computing platform for wearable electronics and WSN focusing on energy harvesting, power management, and power conversion including efficient dc/dc, ac/dc convertors.
Baker authored/co-authored over 30 referred journals and 80 conference proceedings, 3 books, 18 US patents, multiple invited seminars/panelist, and the presenter of 3 conference tutorials including one tutorial on Energy harvesting and Power management for WSN at the 2015 (ISCAS). Baker is associate editor for microelectronics journal, Elsevier and serves in many technical committee for IEEE conferences and reviewers for journals includingTVLSI, IEEE Circuits and Systems.
Dr. Mohammad has