Cantitate/Preț
Produs
Total produse
Vezi coșul
UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs de Martin Dan¿k

UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs

Autor Martin Dan¿k, Leo¿ Kafka, Luká¿ Kohout, Jaroslav Sýkora, Roman Bartosi¿ski
en Limba Engleză Paperback – 9 noi 2014
This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs.
Citește tot Restrânge

Preț: 61645 lei

Preț vechi: 72524 lei
-15%

Puncte Express: 925
Paperback 61645 lei
Hardback 62194 lei

Carte tipărită la comandă

Livrare economică 10-24 august

Livrare prin curier în România Termenul estimat este afișat lângă disponibilitate.
Transport gratuit pentru acest produs Plată online sau ramburs, în funcție de opțiunile comenzii.
Retur gratuit în 14 zile Comandă securizată și suport în română.
 Adaugă în coș

Wish list
Gift list
Am citit!
Adaugă în listă

Specificații

ISBN-13: 9781489995704
ISBN-10: 1489995706
Pagini: 240
Ilustrații: XVIII, 222 p.
Dimensiuni: 155 x 235 x 14 mm
Greutate: 0.37 kg
Ediția:2013
Editura: Springer
Locul publicării:New York, NY, United States

Public țintă

Research

Cuprins

Introduction.- The LEON3 Processor.- Microthreaded Extensions.- The Basic UTLEON3 Architecture.- UTLEON3 Programming by Example.- UTLEON3 Implementation Details.- Execution Effieciency of the Microthread Pipeline.- Hardware Families of Threads.- I/O and Interrupt Handling in the Microthread Mode.- The IU3 Pipeline.- Excerpts from the LEON3 Instruction Set.- Relevant LEON3 Registers and Address Space Identifiers.- Scheduler Example.- Used Resources.- Tutorial.

Textul de pe ultima copertă

This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs. 
  • Describes and documents a working SPARC v8, with fine-grain multithreading and fast context switch;
  • Provides VHDL sources for the described processor;
  • Describes a latency-tolerant framework for coupling hardware accelerators to microthreaded processor pipelines;
  • Includes programming by example in the micro-threaded assembly language.