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The Verilog PLI Handbook de Stuart Sutherland

The Verilog PLI Handbook: The Springer International Series in Engineering and Computer Science, cartea 666

Autor Stuart Sutherland
en Limba Engleză Paperback – 18 apr 2013
by Maq Mannan President and CEO, DSM Technologies Chairman of the IEEE 1364 Verilog Standards Group Past Chairman of Open Verilog International One of the major strengths of the Verilog language is the Programming Language Interface (PLI), which allows users and Verilog application developers to infinitely extend the capabilities of the Verilog language and the Verilog simulator. In fact, the overwhelming success of the Verilog language can be partly attributed to the exi- ence of its PLI. Using the PLI, add-on products, such as graphical waveform displays or pre and post simulation analysis tools, can be easily developed. These products can then be used with any Verilog simulator that supports the Verilog PLI. This ability to create thi- party add-on products for Verilog simulators has created new markets and provided the Verilog user base with multiple sources of software tools. Hardware design engineers can, and should, use the Verilog PLI to customize their Verilog simulation environment. A Company that designs graphics chips, for ex- ple, may wish to see the simulation results of a new design in some custom graphical display. The Verilog PLI makes it possible, and even trivial, to integrate custom so- ware, such as a graphical display program, into a Verilog simulator. The simulation results can then dynamically be displayed in the custom format during simulation. And, if the company uses Verilog simulators from multiple simulator vendors, this integrated graphical display will work with all the simulators.
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Specificații

ISBN-13: 9781475783711
ISBN-10: 147578371X
Pagini: 812
Ilustrații: XXIV, 784 p.
Dimensiuni: 155 x 235 x 44 mm
Greutate: 1.21 kg
Ediția:Softcover reprint of the original 2nd edition 2002
Editura: Springer
Colecția The Springer International Series in Engineering and Computer Science
Seria The Springer International Series in Engineering and Computer Science

Locul publicării:New York, NY, United States

Public țintă

Research

Cuprins

The VPI Portion of the Verilog PLI Standard.- Creating PLI Applications Using VPI Routines.- Interfacing VPI Applications to Verilog Simulators.- How to Use the VPI Routines.- Details about the VPI Routine Library.- Reading and Modifying Values Using VPI Routines.- Synchronizing to Simulations Using VPI Callbacks.- The TF/ACC Portion of the Verilog PLI Standard.- Creating PLI Applications Using TF and ACC Routines.- Interfacing TF/ACC Applications to Verilog Simulators.- How to Use the TF Routines.- Reading and Writing Values Using TF Routines.- Synchronizing to Simulations Using Misctf Routines.- Interfacing to C Models Using TF Routines.- How to Use the ACC Routines.- Details on the ACC Routine Library.- Reading and Modifying Values Using ACC Routines.- Using the Value Change Link (VCL).- Interfacing to C Models Using ACC Routines.- Interfacing to C Models Using VPI Routines.

Recenzii

"The Verilog PLI Handbook is the best book written about the PLI. Use it once, and it will pay for itself by saving you a great deal of time. The book brings clarity to the Verilog Programming Language Interface. The descriptions and extensive examples shed new light on the many dark corners of the PLI. Stuart Sutherland has produced the definitive guide, covering all versions and uses for the PLI. I recommend this book to all Verilog users who want to learn about the PLI."
(Chris Spear, Verification Consultant, Synopsys, Inc.)

Notă biografică

Mr. Stuart Sutherland is a member of the IEEE Verilog standards committee, where he is co-chair of the PLI standards task force and technical editor for the PLI sections of the IEEE 1364 Verilog Language Reference Manual. 
Mr. Sutherland has more than 14 years of experience in hardware design and over ten years of experience with Verilog. He is the founder of Sutherland HDL Inc., located in Portland Oregon. Sutherland HDL provides expert Verilog HDL and Verilog PLI design services, including training, modeling, design verification and software tool evaluation. Verilog training is one of the specialties of Sutherland HDL. Prior to founding Sutherland HDL in 1992, Mr. Sutherland was as an engineer at Sanders Display Products Division in New Hampshire, where he worked on high speed graphics systems for the defense industry. In 1988, he became a senior applications engineer for Gateway Design Automation, the founding company of Verilog. AtGateway, which was acquired by Cadence Design Systems in 1989, Mr. Sutherland specialized in training and support for logic simulation, timing analysis, fault simulation, and the Verilog PLI. Mr. Sutherland has also worked closely with several EDA vendors to specify, test and bring to market Verilog simulation products.  Mr. Sutherland holds a Bachelor of Science in Computer Science, with an emphasis in Electronic Engineering Technology, from Weber State University (Ogden, Utah) and Franklin Pierce College (Nashua, New Hampshire). He has taught Verilog engineering courses at the University of California, Santa Cruz (Santa Clara extension), and has authored the popular "Verilog HDL Quick Reference Guide" and "Verilog PU Quick Reference Guide". He has presented tutorials and papers at the International Verilog Conference and at the International Cadence User's Group Conference, and has won awards for best speaker and best tutorial.