Structural Decision Diagrams in Digital Test: Computer Science Foundations and Applied Logic
Autor Raimund Ubar, Jaan Raik, Maksim Jenihhin, Artur Jutmanen Limba Engleză Hardback – 30 ian 2024
Găsim în această carte un set robust de resurse metodologice și algoritmi specializați pentru modelarea circuitelor digitale, volumul fiind însoțit de numeroase exemple de lucru care ilustrează sinteza și optimizarea diagramelor de decizie. Structural Decision Diagrams in Digital Test reprezintă prima lucrare care sintetizează modelarea sistemelor digitale prin intermediul diagramelor de decizie structurale (DD), oferind o alternativă eficientă la reprezentările tradiționale prin integrarea simultană a informațiilor funcționale și structurale.
Observăm o organizare riguroasă a materialului în opt capitole, începând cu fundamentarea teoretică a diagramelor binare sintetizate structural (SSBDDs) la nivel logic și avansând către diagramele de decizie de nivel înalt (HLDDs). Această progresie permite autorilor să abordeze sarcini complexe de Electronic Design Automation (EDA), precum identificarea căilor critice de temporizare și simularea defectelor multi-valente. Subliniem faptul că volumul nu se limitează la teorie, ci oferă soluții ierarhice pentru testarea sistemelor complexe, inclusiv strategii specifice pentru microprocesoare.
Complementar lucrării Decision Diagram Techniques for Micro- and Nanoelectronic Design Handbook, care oferă o perspectivă aplicată generală asupra tehnicilor DD în automatizarea proiectării, acest volum se concentrează specific pe zona de testare și diagnosticare, introducând modelele SSBDD și HLDD ca instrumente de precizie pentru fiabilitate. În contextul operei autorilor, lucrarea rafinează conceptele explorate în Design and Test Technology for Dependable Systems-On-Chip, trecând de la arhitectura generală a sistemelor sigure la mecanismele matematice și structurale profunde care stau la baza detectării defectelor în hardware-ul modern.
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Specificații
ISBN-10: 3031447336
Pagini: 612
Ilustrații: XIII, 595 p. 318 illus., 62 illus. in color.
Dimensiuni: 160 x 241 x 36 mm
Greutate: 1.19 kg
Ediția:1st ed. 2024
Editura: birkhäuser
Colecția Computer Science Foundations and Applied Logic
Seria Computer Science Foundations and Applied Logic
Locul publicării:Cham, Switzerland
De ce să citești această carte
Această lucrare este esențială pentru cercetătorii și inginerii care proiectează sisteme digitale unde fiabilitatea este critică. Cititorul câștigă o metodologie unitară de diagnosticare, învățând să utilizeze diagramele de decizie pentru a reduce complexitatea simulărilor de defecte. Este un instrument practic pentru optimizarea proceselor de testare în designul de circuite integrate și microprocesoare, oferind un avantaj competitiv în utilizarea noilor modele SSBDD și HLDD.
Despre autor
Echipa de autori reunește experți de prestigiu de la Universitatea de Tehnologie din Tallinn, Estonia. Raimund Ubar este profesor emerit cu o carieră dedicată fiabilității sistemelor, în timp ce Jaan Raik și Maksim Jenihhin sunt profesori titulari specializați în sisteme informatice. Artur Jutman, cercetător și CEO al Testonica Lab, aduce o perspectivă industrială valoroasă asupra testării hardware. Expertiza lor combinată în diagnosticarea defectelor și proiectarea sistemelor dependabile transformă acest volum într-o referință academică și tehnică de cel mai înalt nivel.
Descriere scurtă
The book introduces and discusses applications of two types of structural decision diagrams (DDs): low-level, structurally synthesized binary DDs (SSBDDs) and high-level DDs (HLDDs) that enable diagnostic modeling of complex digital circuits and systems.
Topics and features:
- Provides the definition, properties and techniques for synthesis, compression and optimization of SSBDDs and HLDDs
- Provides numerous working examples that illustrate the key points of the text
- Describes applications of SSBDDs and HLDDs for various electronic design automation (EDA) tasks, such as logic-level fault modeling and simulation, multi-valued simulation, timing-critical path identification, and test generation
- Discusses the advantages of the proposed model to traditional binary decision diagrams and other traditional design representations
- Combines SSBDDs with HLDDs for multi-level representation of digital systems for enabling hierarchical and cross-level solving of complex test-related tasks
Three authors are affiliated with the Dept. of Computer Systems at the Tallinn University of Technology, Estonia: Raimund Ubar is a retired Professor, Jaan Raik and Maksim Jenihhin are tenured Professors. Artur Jutman, PhD, is a researcher at the same university and the CEO of Testonica Lab Ltd., Estonia.
Cuprins
Notă biografică
Recent books:
1. R.Ubar, A.Jasnetski, A.Tsertov, A.S.Oyeniran. Software-Based Self-Test with Decision Diagrams for Microprocessors. Lambert Academic Publishing, 2018, 171 p.
2. R.Ubar, J.Raik, H.-T.Vierhaus (Eds). Design and Test Technology for Dependable Systems-on-Chip. IGI Global, 2011, 550 p.
3. O.Novak, E.Gramatova, R.Ubar. Handbook of Electronic Testing. CTU Printhouse, Prague, 2005, 400 p
Prof. Jaan Raik is a professor of digital systems' verification at the Department of Computer Systems and the head of the Centre for Dependable Computing Systems of Tallinn University of Technology (TalTech), Estonia. Prof. Raik received his M.Sc. and Ph.D. degrees at TalTech in 1997 and in 2001, respectively. He has co-authored more than 200 peer-reviewed scientific publications. His research interests cover a wide area in electrical engineering and computer science domains, including hardware test, functional verification, fault-tolerance and security as well as emerging computer architectures. He is a member of IEEE Computer Society, HiPEAC and a member of steering/program committees of several leading conferences in his fields. He acted as the General Co-Chair of IEEE European Test Symposium 2020, the General Chair of the IFIP/IEEE VLSI-SoC'16 and IEEE DDECS'12 Conferences and the Program Co-Chair of IEEE DDECS'23, CDN-Live'16 and the Program Chair of IEEE DDECS'15. He was the main coordinator for several Europe-wide research and collaboration actions. 16 PhD Theses have been successfullydefended under his supervision.
Prof. Maksim Jenihhin is a tenured associate professor of Computing Systems Reliability at the Department of Computer Systems of Tallinn University of Technology and the head of the research group “Trustworthy and Efficient Computing Hardware”. He received his Ph.D. degree in Computer Engineering from the same university in 2008. His research interests include methodologies and EDA tools for hardware design, verification and debugging as well as nanoelectronics reliability and manufacturing test topics. He supervised 5 PhD theses on these topics and published more than 170 peer-reviewed publications. He is a coordinator for national and European research projects, including H2020 MSCA ITN “RESCUE - Interdependent Challenges of Reliability, Security and Quality in Nanoelectronic Systems Design”, PRG 2022 “CRASHLESS- Cross-Layer Reliability and Self-Health Awareness for Intelligent Autonomous Systems”. Prof. Jenihhin is a member of executive and program committees for IEEE ETS, DATE, DDECS, and a number of other international events and served as a guest editor for special issues of journals.
Dr. Artur Jutman has been managing industrial and research projects in Testonica Lab Ltd. for over 15 years now. His professional focus embraces such topics as diagnostic and defect modeling, test optimization, embedded test instrumentation, test firmware, BIST, DFT as well as both ASIC and system test in a broad sense - all yielding over 160 peer-reviewed research papers published. Dr. Jutman has co-ordinated several EU-funded research projects on test-related topics, participated in organizing test conferences and workshops across Europe as well as given several keynotes, invited talks, embedded and full tutorials at international conferences and symposia. Being deeply inspired by test technologies, Artur has given numerous hands-on training sessions and lecture courses in testing, diagnostics, and DFT for industrial engineers and graduate students in several countries, incl. Germany, Italy, Sweden, Portugal, Russia, and Estonia. Before starting his industrial career, Dr. Jutman spent cumulatively several years being a visiting researcher in several universities across Europe, incl. TU Darmstadt, TU Ilmenau, TU Warsaw, TU Jonkoping, Politecnico di Torino, University of Aveiro, and University of Linkoping. He is also a member of the executive committee of the Nordic Test Forum (NTF) society. Dr. Artur Jutman received his M.Sc. and Ph.D. degrees in computer engineering from Tallinn University of Technology, Estonia in 1999 and 2004 respectively.