Software and Compilers for Embedded Systems
Editat de Henk Schepersen Limba Engleză Paperback – 23 aug 2004
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Specificații
ISBN-13: 9783540230359
ISBN-10: 3540230351
Pagini: 276
Ilustrații: X, 266 p.
Dimensiuni: 155 x 235 x 16 mm
Greutate: 0.42 kg
Ediția:2004
Editura: Springer
Locul publicării:Berlin, Heidelberg, Germany
ISBN-10: 3540230351
Pagini: 276
Ilustrații: X, 266 p.
Dimensiuni: 155 x 235 x 16 mm
Greutate: 0.42 kg
Ediția:2004
Editura: Springer
Locul publicării:Berlin, Heidelberg, Germany
Public țintă
ResearchCuprins
Invited Talk.- The New Economics of Embedded Systems.- Application Specific (Co)Design.- A Framework for Architectural Description of Embedded System.- Automatically Customising VLIW Architectures with Coarse Grained Application-Specific Functional Units.- ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study.- System and Application Synthesis.- Compact Procedural Implementation in DSP Software Synthesis Through Recursive Graph Decomposition.- An Integer Linear Programming Approach to Classify the Communication in Process Networks.- Predictable Embedded Multiprocessor System Design.- Data Flow Analysis.- Suppression of Redundant Operations in Reverse Compiled Code Using Global Dataflow Analysis.- Fast Points-to Analysis for Languages with Structured Types.- Data Partitioning.- An Automated C++ Code and Data Partitioning Framework for Data Management of Data-Intensive Applications.- Combined Data Partitioning and Loop Nest Splitting for Energy Consumption Minimization.- On the Phase Coupling Problem Between Data Memory Layout Generation and Address Pointer Assignment.- Task Scheduling.- Dynamic Mapping and Ordering Tasks of Embedded Real-Time Systems on Multiprocessor Platforms.- Integrated Intra- and Inter-task Cache Analysis for Preemptive Multi-tasking Real-Time Systems.- A Fuzzy Adaptive Algorithm for Fine Grained Cache Paging.- Code Generation.- DSP Code Generation with Optimized Data Word-Length Selection.- Instruction Selection for Compilers That Target Architectures with Echo Instructions.- A Flexible Tradeoff Between Code Size and WCET Using a Dual Instruction Set Processor.
Caracteristici
Includes supplementary material: sn.pub/extras