Software Defined Radio (SDR) describes the change in wireless communication architectures from inflexible application-specific hardware to software-programmable architectures. SDR systems offer more flexibility and potentially shorter development cycles than traditional hardware architectures. This may lead to a significant reduction of development costs. Yet, programmable architectures require more energy and achieve lower throughput than optimized application-specific hardware. Single-instruction, multiple data (SIMD) processor architectures aim at bridging this gap by processing long data vectors in parallel. The book investigates SIMD architectures, focusing on the scalability of SIMD processing and on computationally demanding state-of-the-art wireless communication algorithms. Starting with an overview of commercial and academical SIMD architectures for SDR, a scalable LIW SIMD architecture is developed. Algorithms for the Fast Fourier Transform, MIMO detection by sphere decoding, and the decoding of low-density parity check codes are described in detail and a mapping on the processor architecture is demonstrated. Performance figures complete the analysis.