Semiconductor Advanced Packaging
Autor John H. Lauen Limba Engleză Hardback – 18 mai 2021
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Specificații
ISBN-13: 9789811613753
ISBN-10: 9811613753
Pagini: 520
Ilustrații: XXII, 498 p. 557 illus., 530 illus. in color.
Dimensiuni: 160 x 241 x 34 mm
Greutate: 0.89 kg
Ediția:1st ed. 2021
Editura: Springer
Locul publicării:Singapore, Singapore
ISBN-10: 9811613753
Pagini: 520
Ilustrații: XXII, 498 p. 557 illus., 530 illus. in color.
Dimensiuni: 160 x 241 x 34 mm
Greutate: 0.89 kg
Ediția:1st ed. 2021
Editura: Springer
Locul publicării:Singapore, Singapore
Cuprins
Recent Advance on Semiconductor Packaging.- System-in-Package.- Fan-In Wafer/Panel-Level Chip-Scale Packages.- Fan-Out Wafer/Panel-Level Packaging.- 2D, 2.1D, and 2.3D IC Integration.- 2.5D IC Integration.- 3D IC Integration.- Hybrid Bonding.- Chiplets Packaging.- Dielectric Materials.- Trends and Roadmap for Advanced Semiconductor Packaging.
Notă biografică
John H. Lau, Ph.D., P.E., from July 2019 to June 2021, was the CTO of Unimicron, Taoyuan, Taiwan, where he has been a Senior Special Project Assistant since July 2021. Prior to that, he was a Senior Scientist/MTS with the Hewlett-Packard Laboratory and Agilent, Palo Alto, CA, USA, for 20 years; the Director of the System Packaging Laboratory, Institute of Microelectronics, Singapore, for two years; a Visiting Professor with The Hong Kong University of Science and Technology, Hong Kong, for one year; a Specialist with the Industrial Technology Research Institute, Hsinchu, Taiwan, for five year; a senior technical advisor at ASM Pacific Technology in Hong Kong for five years. He earned a Ph.D. degree in theoretical and applied mechanics from the University of Illinois at Urbana-Champaign. With more than 40 years of R&D and manufacturing experience, he has authored or coauthored more than 530 peer-reviewed technical publications (385 are the principalinvestigator), invented more than 52 issued or pending US patents (31 are the principal inventor), and given more than 350 lectures/workshops/keynotes worldwide. He has authored or coauthored 23 textbooks on fan-out wafer-level packaging, 3D IC heterogeneous integration and packaging, TSV for 3D integration, advanced MEMS packaging, chiplet design and heterogeneous integrated packaging, reliability of 2D and 3D IC interconnects, flip chip, WLP, MCM, area-array packages, WLCSP, high-density PCB, SMT, DCA, TAB, lead-free materials, soldering, manufacturing, and solder joint reliability.
Textul de pe ultima copertă
The book focuses on the design, materials, process, fabrication, and reliability of advanced semiconductor packaging components and systems. Both principles and engineering practice have been addressed, with more weight placed on engineering practice. This is achieved by providing in-depth study on a number of major topics such as system-in-package, fan-in wafer/panel-level chip-scale packages, fan-out wafer/panel-level packaging, 2D, 2.1D, 2.3D, 2.5D, and 3D IC integration, chiplets packaging, chip-to-wafer bonding, wafer-to-wafer bonding, hybrid bonding, and dielectric materials for high speed and frequency. The book can benefit researchers, engineers, and graduate students in fields of electrical engineering, mechanical engineering, materials sciences, and industry engineering, etc.
Caracteristici
Addresses advanced semiconductor packaging both in theory and practice Comprehensively studies design, materials, process, fabrication, and reliability of various advanced semiconductor packaging technologies Provides in-depth treatment of packaging technologies