Performance Analysis of Real-Time Embedded Software
Autor Yau-Tsun Steven Li, Sharad Maliken Limba Engleză Hardback – 30 noi 1998
Existing techniques for this analysis have one or more of the following limitations:
- they cannot model complicated programs
- they cannot model advanced micro-architectural features of the processor, such as cache memories and pipelines
- they cannot be easily retargeted for new hardware platforms.
In Performance Analysis of Real-Time Embedded Software, a new timing analysis technique is presented to overcome the above limitations. The technique determines the bounds on the extreme case (best case and worst case) execution time of a program when running on a given hardware system. It partitions the problem into two sub-problems: program path analysis and microarchitecture modeling.
Performance Analysis of Real-Time Embedded Software will be of interest to Design Automation professionals as well as designers of circuits and systems.
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Specificații
ISBN-13: 9780792383826
ISBN-10: 0792383826
Pagini: 168
Ilustrații: XVII, 146 p.
Dimensiuni: 160 x 241 x 14 mm
Greutate: 0.42 kg
Ediția:1999
Editura: Springer
Locul publicării:New York, NY, United States
ISBN-10: 0792383826
Pagini: 168
Ilustrații: XVII, 146 p.
Dimensiuni: 160 x 241 x 14 mm
Greutate: 0.42 kg
Ediția:1999
Editura: Springer
Locul publicării:New York, NY, United States
Public țintă
ResearchCuprins
1. Introduction.- 1.1 The Emergence of Embedded Systems.- 1.2 Performance Constraints of Embedded Systems.- 1.3 Challenges in Designing Embedded Systems.- 1.4 Research Goals.- 1.5 Summary.- 1.6 Organization of this Book.- 2. Related Work in Timing Analysis for Embedded Software.- 2.1 Introduction.- 2.2 Program Path Analysis.- 2.3 Microarchitecture Modeling.- 2.4 Retargetability Issues.- 2.5 Summary.- 3. Program Path Analysis.- 3.1 Introduction.- 3.2 Problems with Program Path Analysis.- 3.3 Execution Count Analysis.- 3.4 Program Control Flow and Logical Flow.- 3.5 Integer Linear Programming Formulation.- 3.6 Solving ILP Problems.- 3.7 Experimental Validation.- 3.8 Chapter Conclusions.- 4. Microarchitecture Modeling.- 4.1 Introduction.- 4.2 Simple Microarchitectures.- 4.3 Advanced Microarchitectures and Memory Systems.- 4.4 Cache Modeling.- 4.5 Instruction Cache Modeling.- 4.6 Direct Mapped Instruction Cache Analysis.- 4.7 Set Associative Instruction Cache Analysis.- 4.8 Interprocedural Calls.- 4.9 Data Cache Modeling.- 4.10 Pipeline Modeling.- 4.11 Experiments.- 4.12 Chapter Conclusions.- 5. A Retargetable Timing Analysis Tool — Cinderella.- 5.1 Introduction.- 5.2 Issues in Timing Analysis.- 5.3 Classification of Retargeting Information.- 5.4 Implementation of Retargetable Modules.- 5.5 Operations.- 5.6 Chapter Conclusions.- 6. Conclusions.- 6.1 Contributions.- 6.2 Future Research Directions.- Appendices.- A — Practical Complexity of the ILP Problems.- References.