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Integrated Circuit Authentication de Mohammad Tehranipoor

Integrated Circuit Authentication

Autor Mohammad Tehranipoor, Hassan Salmani, Xuehui Zhang
en Limba Engleză Paperback – 23 aug 2016
This book describes techniques to verify the authenticity of integrated circuits (ICs). It focuses on hardware Trojan detection and prevention and counterfeit detection and prevention. The authors discuss a variety of detection schemes and design methodologies for improving Trojan detection techniques, as well as various attempts at developing hardware Trojans in IP cores and ICs. While describing existing Trojan detection methods, the authors also analyze their effectiveness in disclosing various types of Trojans, and demonstrate several architecture-level solutions.
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Specificații

ISBN-13: 9783319374987
ISBN-10: 3319374982
Pagini: 240
Ilustrații: XVI, 222 p. 120 illus., 65 illus. in color.
Dimensiuni: 155 x 235 x 13 mm
Greutate: 0.41 kg
Ediția:Softcover reprint of the original 1st edition 2014
Editura: Springer
Locul publicării:Cham, Switzerland

Cuprins

Introduction.- Hardware Trojan Detection: Untrusted Third-party IP Cores.- Hardware Trojan Detection: Untrusted Manufactured Integrated Circuits.- Design for Hardware Trust: Dummy Scan Flip-flop Insertion.- Design for Hardware Trust: Layout-aware Scan Cell Reordering.- Design for Hardware Trust: Ring Oscillator Network.- Design Vulnerability Analysis.- Trojan Prevention: Built-In Self-Authentication.- Counterfeit Ics: Taxonomies, Assessment, and Challenges.- Counterfeit Ics: Detection and Prevention of Recycled Ics Using On-chip Sensors.- Counterfeit Ics: Pathy-Delay Fingerprinting.

Textul de pe ultima copertă

This book provides readers with a comprehensive introduction to hardware Trojans.  The authors explain the hardware Trojan taxonomy in detail, while delivering deep understanding of the potential impacts throughout the integrated circuit (IC) lifecycle. While discussing the shortcomings of current, industrial IC testing techniques for hardware Trojans, the authors describe the details of emerging techniques to detect them and to prevent their insertion into products.
 
·         Provides a comprehensive introduction to hardware Trojans and their potential impact on the integrated circuit lifecycle;
·         Equips designers with tools for identifying potential vulnerabilities throughout the design cycle and manufacturing;
·         Describes state-of-the-art techniques for hardware Trojan design, detection, and prevention;
·         Analyzes susceptibility at the behavioral-, gate-, layout-level to Trojan insertion.

Caracteristici

Provides a single-source reference to hardware Trojans and counterfeit detection in integrated circuits Equips designers with architecture-level solutions to improve detection and prevention of hardware Trojans and counterfeits Enables a strategy of silicon design authentication to verify the trustworthiness manufactured chips, validating the chip’s conformance with the original functional and performance specifications Includes supplementary material: sn.pub/extras

Notă biografică

This book introduces new techniques for detecting and diagnosing small-delay defects (SDD) in integrated circuits. Although this sort of timing defect is commonly found in integrated circuits manufactured with nanometer technology, this will be the first book to introduce effective and scalable methodologies for screening and diagnosing small-delay defects, including important parameters such as process variations, crosstalk, and power supply noise. This book presents new techniques and methodologies to improve overall SDD detection with very small pattern sets. These methods can result in pattern counts as low as a traditional 1-detect pattern set and long path sensitization and SDD detection similar to or even better than n-detect or timing-aware pattern sets. The important design parameters and pattern-induced noises such as process variations, power supply noise (PSN) and crosstalk are taken into account in the methodologies presented. A diagnostic flow is also presented to identify whether the failure is caused by PSN, crosstalk, or a combination of these two effects.Provides an introduction to VLSI testing and diagnosis, with a focus on delay testing and small-delay defects; Presents the most effective techniques for screening small-delay defects, such as long path-based, slack-based, critical fault-based, and noise-aware methodologies; Shows readers to use timing information for small-delay defect diagnosis, in order to increase the resolution of their current diagnosis flow.