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Hardware and Software: Verification and Testing de Kerstin Eder

Hardware and Software: Verification and Testing: Programming and Software Engineering

Editat de Kerstin Eder, João Louren¿o, Onn Shehory
en Limba Engleză Paperback – 9 oct 2012
This book constitutes the thoroughly refereed post-conference proceedings of the 7th International Haifa Verification Conference, HVC 2011, held in Haifa, Israel in December 2011.
The 15 revised full papers presented together with 3 tool papers and 4 posters were carefully reviewed and selected from 43 submissions. The papers are organized in topical sections on synthesis, formal verification, software quality, testing and coverage, experience and tools, and posters- student event.
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Specificații

ISBN-13: 9783642341878
ISBN-10: 364234187X
Pagini: 276
Ilustrații: XII, 263 p. 95 illus.
Dimensiuni: 155 x 235 x 16 mm
Greutate: 0.42 kg
Ediția:2012
Editura: Springer
Seria Programming and Software Engineering

Locul publicării:Berlin, Heidelberg, Germany

Public țintă

Research

Cuprins

Preprocessing and Inprocessing Techniques in SAT.- Pioneering the Future of Verification: A Spiral of Technological and Business Innovation.- Automated Detection and Repair of Concurrency Bugs.- Verification Challenges of Workload Optimized Hardware Systems.- Synthesis with Clairvoyance.- Generalized Reactivity(1) Synthesis without a Monolithic Strategy.- IIS-Guided DFS for Efficient Bounded Reachability Analysis of Linear Hybrid Automata.- Cube and Conquer: Guiding CDCL SAT Solvers by Lookaheads.Implicative Simultaneous Satisfiability and Applications.- Liveness vs Safety – A Practical Viewpoint.- Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search.- SAM: Self-adaptive Dynamic Analysis for Multithreaded Programs.- Concurrent Small Progress Measures.- Specification and Quantitative Analysis of Probabilistic Cloud Deployment Patterns.- Interpolation-Based Function Summaries in Bounded Model Checking.- Can File Level Characteristics Help Identify System Level Fault-Proneness.- Reverse Coverage Analysis.- Symbolic Testing of OpenCL Code.- Dynamic Test Data Generation for Data Intensive Applications.- Injecting Floating-Point Testing Knowledge into Test Generators.- Combining Theorem Proving and Symbolic Trajectory Evaluation in THM&STE.- HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware.- On-Line Detection and Prediction of Temporal Patterns.- Function Summaries in Software Upgrade Checking.- The Rabin Index of Parity Games.- Using Computational Biology Methods to Improve Post-silicon Microprocessor Testing.
.- ioneering the Future of Verification: A Spiral of Technological and Business Innovation.- Automated Detection and Repair of Concurrency Bugs.- Verification Challenges of Workload Optimized Hardware Systems.- Synthesis with Clairvoyance.- Generalized Reactivity(1) Synthesis without a Monolithic Strategy.- IIS-Guided DFS for Efficient Bounded Reachability Analysis of Linear HybridAutomata.- Cube and Conquer: Guiding CDCL SAT Solvers by Lookaheads.Implicative Simultaneous Satisfiability and Applications.- Liveness vs Safety – A Practical Viewpoint.- Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search.- SAM: Self-adaptive Dynamic Analysis for Multithreaded Programs.- Concurrent Small Progress Measures.- Specification and Quantitative Analysis of Probabilistic Cloud Deployment Patterns.- Interpolation-Based Function Summaries in Bounded Model Checking.- Can File Level Characteristics Help Identify System Level Fault-Proneness.- Reverse Coverage Analysis.- Symbolic Testing of OpenCL Code.- Dynamic Test Data Generation for Data Intensive Applications.- Injecting Floating-Point Testing Knowledge into Test Generators.- Combining Theorem Proving and Symbolic Trajectory Evaluation in THM&STE.- HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware.- On-Line Detection and Prediction of Temporal Patterns.- Function Summaries in Software Upgrade Checking.- The Rabin Index of Parity Games.- Using Computational Biology Methods to Improve Post-silicon Microprocessor Testing.

Textul de pe ultima copertă

This book constitutes the thoroughly refereed post-conference proceedings of the 7th International Haifa Verification Conference, HVC 2011, held in Haifa, Israel in December 2011.
The 15 revised full papers presented together with 3 tool papers and 4 posters were carefully reviewed and selected from 43 submissions. The papers are organized in topical sections on synthesis, formal verification, software quality, testing and coverage, experience and tools, and posters- student event.

Caracteristici

High quality selected paper Unique visibility State of the art research