Logic Synthesis and Verification Algorithms Autor Gary D. Hachtel et al. 18 mar 2013 Paperback Preț: 610.91 lei 718.71 lei 6-8 săpt. -15%
Logic Minimization Algorithms for VLSI Synthesis The Springer International Series in Engineering and Computer Science, nr. 2 Autor Robert K. Brayton et al. 17 sep 2011 Paperback Preț: 1113.77 lei 1392.22 lei 6-8 săpt. -20%