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3D Microelectronic Packaging: From Fundamentals to Applications: Springer Series in Advanced Microelectronics, cartea 57

Editat de Yan Li, Deepak Goyal
en Limba Engleză Paperback – 13 iul 2018
This volume provides a comprehensive reference for graduate students and professionals in both academia and industry on the fundamentals, processing details, and applications of 3D microelectronic packaging, an industry trend for future microelectronic packages. Chapters written by experts cover the most recent research results and industry progress in the following areas: TSV, die processing, micro bumps, direct bonding, thermal compression bonding, advanced materials, heat dissipation, thermal management, thermal mechanical modeling, quality, reliability, fault isolation, and failure analysis of 3D microelectronic packages. Numerous images, tables, and didactic schematics are included throughout. This essential volume equips readers with an in-depth understanding of all aspects of 3D packaging, including packaging architecture, processing, thermal mechanical and moisture related reliability concerns, common failures, developing areas, and future challenges, providing insights into key areas for future research and development. 
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Specificații

ISBN-13: 9783319830865
ISBN-10: 3319830864
Pagini: 463
Ilustrații: IX, 463 p. 331 illus., 253 illus. in color.
Dimensiuni: 155 x 235 mm
Greutate: 0.66 kg
Ediția:Softcover reprint of the original 1st ed. 2017
Editura: Springer International Publishing
Colecția Springer
Seria Springer Series in Advanced Microelectronics

Locul publicării:Cham, Switzerland

Cuprins

Introduction to 3D Microelectronic Packaging.-3D packaging architecture and assembly process design.-Materials and Processing of TSV.-Microstructural and Reliability Issues of TSV.- Fundamentals and failures in Die preparation for 3D packaging.-Direct Cu to Cu bonding and other alternative bonding techniques in 3D packaging.- Fundamental of Thermal Compression Bonding Technology and Process Materials for 2.5/3D Packages .- Fundamentals of solder alloys in 3D packaging.-Fundamentals of Electromigration in interconnects of 3D packages.-Fundamentals of heat dissipation in 3D IC packaging.- Fundamentals of advanced materials and processes in organic substrate technology.- Die and Package Level Thermal and Thermal/Moisture Stresses in 3-D Packaging: Modeling and Characterization.- Processing and Reliability of Solder Interconnections in Stacked Packaging.- Interconnect Quality and Reliability of 3D Packaging.- Fault isolation and failure analysis of 3D packaging.   


 

Textul de pe ultima copertă

This volume provides a comprehensive reference for graduate students and professionals in both academia and industry on the fundamentals, processing details, and applications of 3D microelectronic packaging, an industry trend for future microelectronic packages. Chapters written by experts cover the most recent research results and industry progress in the following areas: TSV, die processing, micro bumps, direct bonding, thermal compression bonding, advanced materials, heat dissipation, thermal management, thermal mechanical modeling, quality, reliability, fault isolation, and failure analysis of 3D microelectronic packages. Numerous images, tables, and didactic schematics are included throughout. This essential volume equips readers with an in-depth understanding of all aspects of 3D packaging, including packaging architecture, processing, thermal mechanical and moisture related reliability concerns, common failures, developing areas, and future challenges, providing insights intokey areas for future research and development.
  • Provides comprehensive coverage of the state-of-the-art in 3D microelectronic packages
  • Covers advanced materials and processes, quality and reliability concerns, and fault isolation and failure analysis
  • Discusses 3D electronic package architecture and assembly process design
  • Features contributions from both academic and industry authors, for a complete view of this important technology

Caracteristici

Provides comprehensive coverage of the state-of-the-art in 3D microelectronic packages Covers advanced materials and processes, quality and reliability concerns, and fault isolation and failure analysis Discusses 3D electronic package architecture and assembly process design Features contributions from both academic and industry authors, for a complete view of this important technology Includes supplementary material: sn.pub/extras

Notă biografică

Dr. Yan Li is currently a senior staff package engineer in Assembly Test and Technology Development Failure Analysis Lab of Intel Corporation located in Chandler, Arizona. Dr. Li received her Ph.D. degree in Materials Science and Engineering from Northwestern University in 2006, and her M.S and B.S degree in Physics from Peking University. As the lead package failure analysis engineer of 3D package technology development projects in Intel, Dr. Li has been actively involved in numerous packaging related technical solutions, and focusing on the quality and reliability of electronic packages, fundamental understanding of failure modes and failure mechanisms of electronic packages, developing new tools and techniques for fault isolation and failure analysis of 3D electronic packages. Dr. Li is a senior member and contributor of many international professional associations, such as Minerals Metals and Materials Society (TMS), American Society for Metals (ASM), and Electronic Device Failure Analysis Society (EDFAS). She has been appointed as TMS and International Symposium for Testing and Failure Analysis (ISTFA) annual conference organizer since 2011. Dr. Li joined the technical committee of International Symposium on the Physical and Failure Analysis of Integrated Circuits. (IPFA) since 2018. She was granted the TMS EMPMD Young Leader Professional Development Award in 2014. Dr. Li has published over 20 papers and two patents in the microelectronic packaging area. She is the co-editor of a semiconductor industry highly recognized book: “3D Microelectronic Packaging: From Fundamentals to Applications” by Springer.
Dr. Deepak Goyal is currently the Director of the ATTD/ATM Package FA & LYA Labs at Intel. Dr. Goyal graduated with a PhD in Materials Science and Engineering from State University of New York, Stony Brook. His responsibilities include development of the next generation of analytical tools and techniques, defect characterization, fault isolation, failure and materials analyses for the next generation package, substrates and boards technology development at Intel and Package FA/LYA for Intel’s Assembly Test and Manufacturing. He has helped with the development of all Intel assembly technologies including FCxGA, FCCSP, TSVs, EMIB and Foveros. He is an expert in the failure analysis of packages and has taught Professional Development courses on Package FA/FI methods and failure mechanisms at the Electronics Components and Technology Conference (ECTC). He has won two Intel Achievement Awards and 25 Division Recognition Awards at Intel. Deepak has authored and co-authored over 50 papers and holds 11 US patents with 5 more in flight. He has co-authored several book chapters and has co-edited a book titled “3D Microelectronic Packaging - From Fundamentals to Applications”. He is a senior member of the IEEE and was the chair of the Package and Interconnect Failure Analysis Forum sponsored by the International Sematech and a past chair of theECTC Applied Reliability Committee.