The use of low dielectric constant (low-k) interdielectrics in multilevel structure integrated circuits (ICs) can lower line-to-line noise in interconnects and alleviate power dissipation issues by reducing the capacitance between the interconnect conductor lines. Because of these merits, low-k interdielectric materials are currently in high demand in the development of advanced ICs. One important approach to obtaining low-k values is the incorporation of nanopores into dielectrics. This book provides an overview of the methodologies and characterisation techniques used for investigating low-k nanoporous interdielectrics.