Design, Analysis and Test of Logic Circuits Under Uncertainty
Autor Smita Krishnaswamy et al.
15 oct 2014
Paperback
Preț: 608.15 lei 715.47 lei
6-8 săpt.
-15%
Cărți de John P. Hayes
Layout Minimization of CMOS Cells
Autor Robert L. Maziasz et al.
31 oct 1991
Hardback
Preț: 616.45 lei 725.24 lei
6-8 săpt.
-15%
Quantum Circuit Simulation
Autor George F Viamontes et al.
dec 2009
Hardback
Preț: 630.54 lei 741.80 lei
6-8 săpt.
-15%
Hierarchical Modeling for VLSI Circuit Testing
Autor Debashis Bhattacharya et al.
31 dec 1989
Hardback
Preț: 634.63 lei 793.28 lei
6-8 săpt.
-20%