Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping
Editat de Herbert Grünbacher, Reiner W. Hartensteinen Limba Engleză Paperback – 30 aug 1993
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Specificații
ISBN-13: 9783540570912
ISBN-10: 3540570918
Pagini: 232
Ilustrații: IX, 223 p.
Dimensiuni: 155 x 235 x 13 mm
Greutate: 0.36 kg
Ediția:1993
Editura: Springer
Locul publicării:Berlin, Heidelberg, Germany
ISBN-10: 3540570918
Pagini: 232
Ilustrații: IX, 223 p.
Dimensiuni: 155 x 235 x 13 mm
Greutate: 0.36 kg
Ediția:1993
Editura: Springer
Locul publicării:Berlin, Heidelberg, Germany
Public țintă
ResearchCuprins
Overview of complex array-based PLDs.- Technologies and utilization of Field Programmable Gate Arrays.- Some considerations on Field Programmable Gate Arrays and their impact on system design.- SRAM-based FPGAs ease system verification.- MONTAGE: An FPGA for synchronous and asynchronous circuits.- ORCA: A new architecture for high-performance FPGAs.- Patching method for lookup-table type FPGA's.- Automatic one-hot re-encoding for FPGAs.- Minimization of permuted Reed-Muller Trees for cellular logic programmable Gate arrays.- Self-organizing Kohonen maps for FPGA placement.- High level synthesis in an FPGA-based computer aided prototyping environment.- New application of FPGAs to programmable digital communication circuits.- FPGA based logic synthesis of squarers using VHDL.- Optimized fuzzy controller architecture for field programmable gate arrays.- A real-time kernel — Rapid prototyping with VHDL and FPGAs.- JAPROC — A 8 bit micro controller design and its test environment.- Chameleon: A workstation of a different colour.- A highly parallel FPGA-based machine and its formal verification.- FPGA based self-test with deterministic test patterns.- FPGA implementation of systolic sequence alignment.- Using FPGAs to prototype a self-timed computer.- Using FPGAs to implement a reconfigurable highly parallel computer.- Novel high performance machine paradigms and fast-turnaround ASIC design methods: A consequence of, and, a challenge to, field-programmable logic.