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Dependable Computing - EDCC-2

Editat de Andrzej Hlawiczka, Joao G. S. Silva, Luca Simoncini
en Limba Engleză Paperback – 18 sep 1996
This book constitutes the refereed proceedings of the Second European Dependable Computing Conference, EDCC-2, held in Taormina, Italy, in October 1996.
The book presents 26 revised full papers selected from a total of 66 submissions based on the reviews of 146 referees. The papers are organized in sections on distributed fault tolerance, fault injection, modelling and evaluation, fault-tolerant design, basic hardware models, testing, verification, replication and distribution, and system level diagnosis.
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Specificații

ISBN-13: 9783540617723
ISBN-10: 3540617728
Pagini: 464
Ilustrații: XVI, 444 p.
Dimensiuni: 155 x 235 x 25 mm
Greutate: 0.7 kg
Ediția:1996
Editura: Springer
Locul publicării:Berlin, Heidelberg, Germany

Public țintă

Research

Cuprins

Friends: A flexible architecture for implementing fault tolerant and secure distributed applications.- Adaptable fault tolerance for distributed process control using exclusively standard components.- On stratified sampling for high coverage estimations.- Fault injection evaluation of assigned signatures in a RISC processor.- An evaluation of the error detection mechanisms in MARS using software-implemented fault injection.- Dependability modeling and analysis of complex control systems: An application to railway interlocking.- The effect of interfailure time variability on the software reliability growth modelling.- Dependability evaluation of a computing system for traction control of electrical locomotives.- Dependability models of RAID using stochastic activity networks.- Compiler assisted self-checking of structural integrity using return address hashing.- Single source fault-tolerant broadcasting for two-dimensional meshes without virtual channels.- On-line testing of an off-the-shelf microprocessor board for safety-critical applications.- The logic threshold based voting: A model for local feedback bridging fault.- On the yield of VLSI processors with on-chip CPU cache.- Design of dependable hardware: What BIST is most efficient?.- Pseudorandom testing of microprocessors at instruction/data flow level.- Multi-level test generation and fault diagnosis for finite state machines.- Dynamic testing from bounded data type specifications.- A theory of specification-based testing for object-oriented software.- Proving safety properties for embedded control systems.- Enhancing dependability of cooperative applications in partitionable environments.- Efficient message logging for uncoordinated checkpointing protocols.- Atomic updates of replicated data.- Removal of all faulty nodes from a fault-tolerant service by means of distributed diagnosis with imperfect fault coverage.- Constraint based system-level diagnosis of multiprocessors.- A unified theory for f1/f2-diagnosable communication networks.