High K Gate Dielectrics: Materials Science and Engineering (Hardcover)
Editat de Michel Houssaen Limba Engleză Hardback – dec 2003
High k Gate Dielectrics reviews the state-of-the-art in high permittivity gate dielectric research. Consisting of contributions from leading researchers from Europe and the USA, the book first describes the various deposition techniques used for construction of layers at these dimensions. It then considers characterization techniques of the physical, chemical, structural, and electronic properties of these materials. The book also reviews the theoretical work done in the field and concludes with technological applications.
Preț: 1543.50 lei
Preț vechi: 1696.16 lei
-9%
Puncte Express: 2315
Preț estimativ în valută:
295.72€ • 320.32$ • 253.59£
295.72€ • 320.32$ • 253.59£
Cartea se retipărește
Doresc să fiu notificat când acest titlu va fi disponibil:
Se trimite...
Preluare comenzi: 021 569.72.76
Specificații
ISBN-13: 9780750309066
ISBN-10: 0750309067
Pagini: 614
Dimensiuni: 174 x 239 x 38 mm
Greutate: 1.17 kg
Ediția:1
Editura: CRC Press
Seria Materials Science and Engineering (Hardcover)
ISBN-10: 0750309067
Pagini: 614
Dimensiuni: 174 x 239 x 38 mm
Greutate: 1.17 kg
Ediția:1
Editura: CRC Press
Seria Materials Science and Engineering (Hardcover)
Public țintă
Graduate students and researchers in applied physics and electrical and electronic engineeringCuprins
Introduction
The need for high-k gate dielectrics and materials requirement
Deposition techniques
ALCVD, MOCVD, PLD, MBE
Characterization
Physico-chemical characterization
X-ray and electron spectroscopies
Oxygen diffusion and thermal stability
Defect characterization by ESR
Band alignment determined by photo-injection
Electrical characteristics
Theory of defects in high-k materials
Bonding constraints and defect formation at Si/high-k interfaces
Band alignment calculations
Electron mobility at the Si/high-k interface
Model for defect generation during electrical stress
Technological aspects
Device integration issues
Device concepts for sub-100 nm CMOS technologies
Transistor characteristics
Nonvolatile memories based on high-k ferroelectric layers
The need for high-k gate dielectrics and materials requirement
Deposition techniques
ALCVD, MOCVD, PLD, MBE
Characterization
Physico-chemical characterization
X-ray and electron spectroscopies
Oxygen diffusion and thermal stability
Defect characterization by ESR
Band alignment determined by photo-injection
Electrical characteristics
Theory of defects in high-k materials
Bonding constraints and defect formation at Si/high-k interfaces
Band alignment calculations
Electron mobility at the Si/high-k interface
Model for defect generation during electrical stress
Technological aspects
Device integration issues
Device concepts for sub-100 nm CMOS technologies
Transistor characteristics
Nonvolatile memories based on high-k ferroelectric layers