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High K Gate Dielectrics: Materials Science and Engineering (Hardcover)

Editat de Michel Houssa
en Limba Engleză Hardback – dec 2003
The drive toward smaller and smaller electronic componentry has huge implications for the materials currently being used. As quantum mechanical effects begin to dominate, conventional materials will be unable to function at scales much smaller than those in current use. For this reason, new materials with higher electrical permittivity will be required, making this is a subject of intensive research activity within the microelectronics community.

High k Gate Dielectrics reviews the state-of-the-art in high permittivity gate dielectric research. Consisting of contributions from leading researchers from Europe and the USA, the book first describes the various deposition techniques used for construction of layers at these dimensions. It then considers characterization techniques of the physical, chemical, structural, and electronic properties of these materials. The book also reviews the theoretical work done in the field and concludes with technological applications.
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Specificații

ISBN-13: 9780750309066
ISBN-10: 0750309067
Pagini: 614
Dimensiuni: 174 x 239 x 38 mm
Greutate: 1.17 kg
Ediția:1
Editura: CRC Press
Seria Materials Science and Engineering (Hardcover)


Public țintă

Graduate students and researchers in applied physics and electrical and electronic engineering

Cuprins

Introduction
The need for high-k gate dielectrics and materials requirement
Deposition techniques
ALCVD, MOCVD, PLD, MBE
Characterization
Physico-chemical characterization
X-ray and electron spectroscopies
Oxygen diffusion and thermal stability
Defect characterization by ESR
Band alignment determined by photo-injection
Electrical characteristics
Theory of defects in high-k materials
Bonding constraints and defect formation at Si/high-k interfaces
Band alignment calculations
Electron mobility at the Si/high-k interface
Model for defect generation during electrical stress
Technological aspects
Device integration issues
Device concepts for sub-100 nm CMOS technologies
Transistor characteristics
Nonvolatile memories based on high-k ferroelectric layers